As a result of aggressive downscaling, short-channel effects (SCEs) become a major threat for future downscaling especially in the sub-100nm region. In order to extend the International Technology Road-map for Semiconductors (ITRS) road-map beyond 100nm, Double-Gate (DG) MOSFET evinces himself as a major promising candidate due to its higher scaling capability. In this book, modelling using a pseudo- two-dimensional (2D) analysis was presented to explore the effect of scaling especially for subthreshold characteristics of ...
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As a result of aggressive downscaling, short-channel effects (SCEs) become a major threat for future downscaling especially in the sub-100nm region. In order to extend the International Technology Road-map for Semiconductors (ITRS) road-map beyond 100nm, Double-Gate (DG) MOSFET evinces himself as a major promising candidate due to its higher scaling capability. In this book, modelling using a pseudo- two-dimensional (2D) analysis was presented to explore the effect of scaling especially for subthreshold characteristics of short-channel DG and conventional single gate MOSFET.
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PLEASE NOTE, WE DO NOT SHIP TO DENMARK. New Book. Shipped from UK in 4 to 14 days. Established seller since 2000. Please note we cannot offer an expedited shipping service from the UK.
Choose your shipping method in Checkout. Costs may vary based on destination.
Seller's Description:
PLEASE NOTE, WE DO NOT SHIP TO DENMARK. New Book. Shipped from UK in 4 to 14 days. Established seller since 2000. Please note we cannot offer an expedited shipping service from the UK.
