Today's microprocessors are the powerful descendants of the von Neumann 1 computer dating back to a memo of Burks, Goldstine, and von Neumann of 1946. The so-called von Neumann architecture is characterized by a se- quential control flow resulting in a sequential instruction stream. A program counter addresses the next instruction if the preceding instruction is not a control instruction such as, e. g., jump, branch, subprogram call or return. An instruction is coded in an instruction format of fixed or variable length, ...
Read More
Today's microprocessors are the powerful descendants of the von Neumann 1 computer dating back to a memo of Burks, Goldstine, and von Neumann of 1946. The so-called von Neumann architecture is characterized by a se- quential control flow resulting in a sequential instruction stream. A program counter addresses the next instruction if the preceding instruction is not a control instruction such as, e. g., jump, branch, subprogram call or return. An instruction is coded in an instruction format of fixed or variable length, where the opcode is followed by one or more operands that can be data, addresses of data, or the address of an instruction in the case of a control instruction. The opcode defines the types of operands. Code and data are stored in a common storage that is linear, addressed in units of memory words (bytes, words, etc. ). The overwhelming design criterion of the von Neumann computer was the minimization of hardware and especially of storage. The most simple implementation of a von Neumann computer is characterized by a microar- chitecture that defines a closely coupled control and arithmetic logic unit (ALU), a storage unit, and an I/O unit, all connected by a single connection unit. The instruction fetch by the control unit alternates with operand fetches and result stores for the AL U.
Read Less
Add this copy of Processor Architecture: From Dataflow to Superscalar to cart. $13.98, good condition, Sold by HPB-Red rated 5.0 out of 5 stars, ships from Dallas, TX, UNITED STATES, published 1999 by Springer.
Choose your shipping method in Checkout. Costs may vary based on destination.
Seller's Description:
Good. Connecting readers with great books since 1972! Used textbooks may not include companion materials such as access codes, etc. May have some wear or writing/highlighting. We ship orders daily and Customer Service is our top priority!
Add this copy of Processor Architecture: From Dataflow to Superscalar to cart. $15.24, very good condition, Sold by BooksRun rated 4.0 out of 5 stars, ships from Philadelphia, PA, UNITED STATES, published 1999 by Springer.
Add this copy of Processor Architecture: From Dataflow to Superscalar to cart. $67.18, very good condition, Sold by KimmiesCollection rated 5.0 out of 5 stars, ships from Maryville, TN, UNITED STATES, published 1999 by Springer.
