Explaining how HTS is able to explore the synthesis freedom provided at high-level to derive an inherently testable architecture at low or even no overhead, this text provides an introduction to HTS and helps develop an understanding of this emerging technology by presenting a background of HTS terms, operation scheduling and resource allocation algorithms. The book also covers various HTS techniques for scan and built-in self-test methodologies, register-transfer level test synthesis, examples of several effective HTS ...
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Explaining how HTS is able to explore the synthesis freedom provided at high-level to derive an inherently testable architecture at low or even no overhead, this text provides an introduction to HTS and helps develop an understanding of this emerging technology by presenting a background of HTS terms, operation scheduling and resource allocation algorithms. The book also covers various HTS techniques for scan and built-in self-test methodologies, register-transfer level test synthesis, examples of several effective HTS schemes for highly testable digital circuits, and more.
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Dispatched, from the UK, within 48 hours of ordering. Though second-hand, the book is still in very good shape. Minimal signs of usage may include very minor creasing on the cover or on the spine.
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This is an ex-library book and may have the usual library/used-book markings inside. This book has hardback covers. Clean from markings. In good all round condition. No dust jacket. Please note the Image in this listing is a stock photo and may not match the covers of the actual item, 600grams, ISBN: 9780890069073.
