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Design-For-Test and Test Optimization Techniques for Tsv-Based 3D Stacked ICS

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Design-For-Test and Test Optimization Techniques for Tsv-Based 3D Stacked ICS - Noia, Brandon, and Chakrabarty, Krishnendu
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This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test ...

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Design-For-Test and Test Optimization Techniques for Tsv-Based 3D Stacked ICS 2016, Springer, Cham

ISBN-13: 9783319345345

Trade paperback

Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs 2013, Springer International Publishing AG, Cham

ISBN-13: 9783319023779

Hardcover